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950 pmma a4

Manufactured by MicroChem
Sourced in United States

The 950 PMMA A4 is a lab equipment product. It is a polymer material used in various applications. The core function of this product is to serve as a material for specialized processes. No further details on the intended use or performance of this product can be provided in an unbiased and factual manner.

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8 protocols using 950 pmma a4

1

Fabrication of Bi2Se3 Nanosheet Devices

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A 30 nm Al2O3/n-Si wafer was prepared using atomic layer deposition (ALD, PICOSUN R-200 Standard ALD system, Espoo, Finland), with 315 cycles of trimethylaluminum and water vapor pulses under 300 °C. Bi2Se3 nanosheet suspensions were dropped onto the as-prepared silicon wafer and spin-coated at 5000 rpm to obtain a discontinuous membrane of Bi2Se3 nanosheets. Subsequently, a thin film of polymethyl methacrylate (Microchem PMMA 950 A4, NEWTON, MA, USA) was spin-coated onto the membrane and baked at 180 °C for 3 min. Electron-beam lithography (EBL, FEI Inspect F50 ELPHY Quantum, 20 kV, Dortmund, Germany) was applied to locate a single Bi2Se3 nanosheet and define appropriate electrodes. The write field was aligned with a 1 mm standard chess wafer. The electron beam lens aperture was set to 3.5 with a magnification of 1000×, and the scanning step was fixed to 20 nm to achieve a balance between speed and precision. Electron beam evaporation (EBE, Vnano VZS-600, Beijing, China) was applied to deposit 5 nm Ti and 50 nm Au films, followed by a standard lift-off procedure.
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2

Fabrication of SiO2 Nanopillars with Au MIM Layer

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PMMA950
A4 (MicroChem, USA) E-beam resist was spin-coated
at 1500 rpm for 60 s onto an Si substrate cleaned with acetone and
isopropyl alcohol prior to spin-coating. The sample was then exposed
at a dosage of 800 μC cm–2 (Raith EBPG 5200,
Raith Nanofabrication, Germany). Following exposure, development was
carried out using a 1:1 ratio of IPA/MIBK for 1 min. Next, SiO2 was directionally deposited via E-beam evaporation
(CHA MK40 E-Beam Evaporation, CHA Industries, USA) after which lift-off
was performed in Remover PG leaving behind SiO2 nanopillars.
Finally, Au of an appropriate thickness was deposited (CHA MK40 E-Beam
Evaporation, CHA Industries, USA) over SiO2 to generate
the MIM layer.
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3

Fabrication of Silicon Nanopillars

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The silicon master template, consisting of ordered arrays of nanopillars, was fabricated by electron beam lithography (EBL). First, a freshly cleaned Si substrate was spin coated with a positive-tone resist (PMMA 950 A4, MicroChem, USA) of ~300 nm thickness and baked at 180 o C for 5 min.
The desired patterns were defined by electron beam exposure at 20 keV (Raith e_LINE, Raith GmbH, Germany), followed by a MIBK:IPA=1:3 development process. A metallic sacrificial mask was created by thermal evaporation of 80 nm think Cr at 0.1 Å s -1 , followed by lift-off in acetone at room temperature. Next, a reactive ion etching (RIE) recipe with a combination of SF6 and CHF3
was used to etch into the Si substrate for ~120 nm. The Si nanopillars were finally obtained by wet etching of the entire sacrificial hard mask with ceric ammonium nitrate-based etchant (Merck KGaA, Darmstadt, Germany). For large-area patterning in the nanoelectrochemistry application, a larger Si master template (1 cm 2 ) was fabricated by KrF photolithography (ASML KrF Scanner PAS 5500/700D, ASML, Netherlands) followed by HBr/Cl2-based reactive ion etching to achieve a 90 nm trench depth (TCP-9400DFM, Lam Research, CA, USA).
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4

PMMA Deposition on Cu/SiO2/Si Substrate

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PMMA (950 PMMA A4, MicroChem, USA) was spun onto Cu/SiO2/Si substrate at 5,000 rpm for 1 min. The PMMA on the substrate was annealed at 453 K for 3 min in the vacuum oven.
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5

Fabrication of WS2-Graphene Heterostructures

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1L- and 2L-WS2 were mechanically exfoliated from bulk WS2 crystals (2D Semiconductors Inc.) onto the Si wafer with a 90-nm-thick oxide. The number of layers was confirmed by using a combination of photoluminescence and Raman spectroscopy (55 (link)). Monolayer graphene film was grown on copper (Cu) foils at atmospheric pressure using CVD (56 ). The CVD-grown graphene used in this work was polycrystalline with an average grain size of ~15 μm. The heterostructures were assembled by depositing CVD-grown graphene on top of 1L- and 2L-WS2 using an alternative poly(methyl methacrylate) (PMMA) transfer process to minimize aqueous solution at the graphene-WS2 interface (57 (link), 58 ). The CVD-grown graphene on Cu foil was spin-coated (3000 rpm) with 950PMMA-A4 (MicroChem). PMMA-coated graphene was adhered to a polymer frame with a hole at the center and suspended by Cu etching. Residual etchant was diluted with deionized water. The PMMA/graphene membrane was gently blown dry with nitrogen and then brought into contact with WS2 layers followed by baking at around 350 K for 5 min to promote adhesion between graphene and WS2. Finally, the heterostructure was annealed at 420 K in vacuum of 10−5 torr for 2 hours followed by natural cooling. The orientation of WS2 and graphene layers is not aligned in any particular way in the momentum space.
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6

Fabrication of 3D PI Microstructures

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Fabrication of 3D microscale structures in PI began with spin coating a thin sacrificial layer of poly(methyl methacrylate) (∼200 nm in thickness; 950 PMMA A4, MicroChem, USA), followed by spin coating a layer of PI (∼3 to 8 μm in thickness; paa1002, Furunte) on a silicon wafer. Electron beam evaporation allowed deposition of a thin layer of copper (∼100 nm in thickness) or Si (50 nm)/Ni (50 nm). Photolithography and wet etching defined desired patterns for the metal (Cu or Ni) layer, and inductively coupled plasma (ICP) etching defined patterns for the PI layer or bilayer of Si/PI. For 2D precursor structures in PI/Si/Ni, the Ni layer was removed by wet etching. Immersion in acetone to dissolve the underlying PMMA layer yielded released 2D precursor structures that were then retrieved by a PDMS stamp and transferred to a water-soluble tape (PVA; Aquasol Co., USA). The remaining process of the 3D assembly followed similar procedures of 3D microscale structures in SU-8 described above. A schematic illustration of the fabrication process appears in fig. S30.
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7

Raman Characterization of Graphene Transferred on SiO2/Si

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Raman characterization was carried on graphene transferred onto the SiO2/Si wafer by the wet-transfer method. The N-SLG/Cu was spin-coated with a thin poly(methyl methacrylate) (PMMA) layer (950 PMMA A4, 4% in anisole; MicroChem Corp.). After the coating, the PMMA/N-SLG/Cu was annealed at 60°C for 30 min to remove the solvent. Then, the PMMA/N-SLG/Cu was floated on a 20% Na2S2O8 solution to remove the Cu foil. Following this, the floating film was transferred to deionized water to rinse the residual etchant and was scooped by SiO2/Si wafer. To increase the bonding of PMMA/N-SLG, the sample was annealed at 150°C and then 190°C for 10 min. Last, PMMA was removed by acetone leaving N-SLG on the SiO2/Si wafer for Raman characterization.
Single-point data collection and mapping were performed using Renishaw micro-Raman spectroscope equipped with a blue laser (λL = 457 nm, EL = 2.71 eV) and a green laser (λL = 532 nm, EL = 2.33 eV). Analysis of the Raman data was carried out using MATLAB. For calculation of the D and the G peak height, the background was subtracted from the Raman data using the least-squares curve fitting tool (lsqnonlin).
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8

Ultrathin Phototransistor Device Fabrication

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A
bare die phototransistor (ST-0128, Opto Tech Corp.) was mechanically
thinned using a grinding machine (UNIPOL-802, MTI Corp.) for 6 h,
resulting in a reduction of thickness from 200 μm to approximately
20 μm to enable intimate contact with the leaf. As shown in Figure S4, the thin-film phototransistor was
then transfer printed onto an uncured PI film on a sacrificial polymethyl
methacrylate (PMMA, 950 PMMA A4, MicroChem Corp.) layer on a glass
substrate. The PI film was then cured in a vacuum oven at 250 °C
for 2 h. A layer of SU-8 (SU-8 2015, MicroChem Corp.) with a thickness
of 25 μm was spin-coated and patterned to expose the emitter
of the phototransistor and form a square encapsulation layer (1100
× 1100 μm2) that encloses the phototransistor.
Magnetron sputtering and patterning of stacked layers of Ti/Cu/Ti/Au
(5/500/5/50 nm) created interconnection between the emitter and the
pre-defined electrode on the leaf sensor. Plasma etching of the PI
film exposed the sacrificial PMMA, allowing releasing of packaged
phototransistor through dissolving the PMMA in acetone. Finally, the
PI film on the backside of the phototransistor was completely removed
by plasma etching to complete the encapsulation process.
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